PART |
Description |
Maker |
K4D26323AA-GL |
1M x 32Bit x 4 Banks Double Data Rate Synchronous RAM with Bi-directional Data Strobe and DLL Data Sheet
|
Samsung Electronic
|
W9725G6KB25A W9725G6KB-25 W9725G6KB-18 W9725G6KB-3 |
DLL aligns DQ and DQS transitions with clock, Data masks (DM) for write data, Write Data Mask
|
Winbond
|
F-137 |
High Frequency Data Line Filter 3 Coils 6 Data Lines
|
Rhombus Industries Inc.
|
ELS-316GWB |
Technical Data Sheet 0.36 Single Data Displays 技术数据表0.36单数据显
|
Everlight Electronic Co., Ltd. EVERLIGHT[Everlight Electronics Co., Ltd]
|
HI-8787 |
(HI-8787 / HI-8788) 16-BIT PARALLEL DATA CONVERTED 429&561 SERIAL DATA OUT
|
Holt Integrated Circuits
|
M14D5121632A-2K |
Internal pipelined double-data-rate architecture; two data access per clock cycle
|
Elite Semiconductor Mem...
|
HI-878306 |
ARINC INTERFACE DEVICE 8 bit parallel data converted to 429 & 561 serial data out
|
Holt Integrated Circuits
|
S1A0905X01 |
RDS (RADIO DATA SYSTEM) DEMODULATOR IC Data Sheet
|
Samsung Electronic
|
W972GG6JB W972GG6JB-25 |
16M ?8 BANKS ?16 BIT DDR2 SDRAM Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
ST7FDALIF2B6 |
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI, DALI (DATA BRIEFING)
|
SGS Thomson Microelectronics
|
W9412G2IB W9412G2IB4 W9412G2IB-6I |
1M × 4 BANKS × 32 BITS GDDR SDRAM Double Data Rate architecture; two data transfers per clock cycle 4M X 32 DDR DRAM, 0.7 ns, PBGA144
|
Winbond WINBOND ELECTRONICS CORP
|
HSP9501 |
Programmable Data Buffer(???绋??????插?) Data Buffer, Programmable, 32MHz, Data Word to 10-Bits
|
Intersil Corporation
|